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Applying self-adaptive circuitry to improve computer reliability

Improving the reliability of computing systems by using advanced circuitry that can reconfigure itself on the fly is the goal of a new $2.4 million research project at the Stanford Center for Reliable Computing (SCRC).

SCRC will work with scientists from Quickturn Design Systems of Mountain View, Calif. and the University of Texas-Austin on the new three-year development program, which is funded by the Defense Advanced Research Projects Agency (DARPA). The name of the project is ROAR (Reliability Obtained by Adaptive Reconfiguration).

An adaptive computing system is a custom computer that can automatically reconfigure itself in response to rapidly changing environmental and computational requirements. Such a computer is made possible by a special kind of integrated circuit, called a field programmable device (FPI). The electrical pathways in FPDs can actually be routed by an onboard controller. Thus a system built with them can be designed to optimize itself for different conditions, including failures in the field. Low-cost, commercial FPDs are readily available, but have not been extensively applied to military applications.

The U.S. Department of Defense is particularly interested in using adaptive computing for relatively inaccessible systems that operate in harsh and unusual environments, including the battlefield and outer space. Potential applications include automatic target recognition, and signal and image processing. Executing such applications on adaptive hardware has the potential for substantially reducing system cost by replacing expensive, custom-made components with commercial, off-the-shelf varieties.

SCRC researchers realized that an adaptive system's ability to reconfigure itself should be capable of compensating for the higher failure rate likely to occur when commercial chips are subjected to severe conditions. So they submitted a proposal to DARPA designed specifically to determine if such a system can in fact detect and locate its own hardware defects, rapidly reconfigure itself to avoid them, and continue to function satisfactorily.

"To date, little work has been done in the area of dependability of adaptive systems," said Edward J. McCluskey, professor of electrical engineering and computer science at Stanford University. He directs SCRC and is the principal investigator on the project.

Engineering Research Associate LaNae Avra and Consulting Associate Professor Nirmal Saxena from SCRC will serve as project leaders. The other key participants are Michael R. Butts, an emulation architect for Quickturn, and professor Nur Touba from the University of Texas-Austin.

SCRC has been performing state-of-the-art research concerning the design and evaluation of reliable, testable and maintainable computer systems since the early 1970s.

Quickturn's role in the project will be to develop rapid reconfiguration techniques for adaptive systems. The company will apply its expertise in creating "virtual silicon" emulations of electronic designs that allow users to verify that specialty chips and custom integrated circuits work correctly with system hardware and software.

"Adaptive computing requires rapidly configurable hardware computing platforms," Butts said. "This technology has the potential to replace traditional Von Neumann architectures and promises to increase computer power by 100 to one million times in certain applications."

The team from the University of Texas will investigate hardware design techniques that allow field programmable devices to test themselves and precisely locate any defects. "Our charter is to develop adaptive hardware that significantly increases dependability at low cost," team leader Touba said.

In addition, Interra Inc. of San Jose, which provides automation software and services for high-technology industries, will work with SCRC researchers to produce enhanced design tools for the project.


Note: More information about the project is available on the SCRC website at

By David F. Salisbury

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